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SANDISK CORP: Senior Analog & Mixed-Signal Layout Design Engineer

Observed on the employer’s careers system, last checked 2026-09-13.

POSTED: 2026-09-12Listed

Cite: FACTANKER, https://factanker.com/jobs/posting/eec154a5-77bb-4d81-baba-6daac9544bc1

Employer
SANDISK CORP
Location
Bengaluru
Category
Engineering
Posted
2026-09-12
Careers system
smartrecruiters
Observed
2026-09-13

Apply on the employer’s site ↗

Role description

Verbatim from the employer’s posting, rendered as plain text.

We are seeking a highly skilled High-speed SERDES IO PHY Layout designer with 5 - 7 years of experience. Apart from Serdes PHY Layout, the ideal candidate should have a strong background in analog/IO design principles, hands-on experience with layout tools, Automated PnR and a passion for solving challenging technical problems. Key Responsibilities: Develop and optimize Serdes PHY, analog and mixed-signal IC layouts, ensuring high performance and manufacturability. Collaborate with design engineers to understand design requirements and translate them into precise layouts. Strong experience in debugging DRC, ERC, LVS, EMIR and PERC issues independently. Work experience of block PnR to closely interact with physical design team ensuring area/timing/backend compatibility of custom blocks into the overall chip design. Identify and resolve layout-related issues, providing creative solutions…

Provenance

Official posting
https://jobs.smartrecruiters.com/Sandisk/744000149148069
Retrieved
2026-09-13 08:45:00.598816+02:00
ATS reference
744000149148069