job posting · smartrecruiters
SANDISK CORP: Packaging Engineer (Substrate Design and Layout)
Observed on the employer’s careers system, last checked 2026-09-03.
- Employer
- SANDISK CORP
- Location
- Taichung
- Category
- Engineering
- Posted
- 2026-04-14
- Careers system
- smartrecruiters
- Observed
- 2026-09-03
Role description
Verbatim from the employer’s posting, rendered as plain text.
Optimize die bonding pad, flip chip die plot, and substrate layout to streamline design complexity and reduce cost for ASIC and SiP packaging solutions, including SSD controllers, NAND BGA, uSD, SD, and USB products. Support the development and integration of advanced packaging technologies, with a focus on standalone ASIC, MCM FCBGA, and 2.5D. Emphasis is placed on interposer/substrate/board co-design, design rule definition, and cross-functional collaboration. Conduct substrate layout feasibility studies, die fitment analysis, and prepare comprehensive design documentation. Maintain and manage design libraries, and generate accurate bonding diagrams to support layout and assembly processes. Collaborate closely with hardware, assembly, and packaging engineering teams across multiple Sandisk sites to enable new product development and continuous substrate design improvement. Interface…
Provenance
744000120605302